Charge-coupled devices (CCDs) were first introduced by Bell Telephone Laboratories in 1970. The potential of these devices was quickly recognized, and used spanning almost all electronic fields were proposed. The ability to store charge led immediately to proposals of CCD memories and logic circuits. The ability to work in the charge domain has its advantages in the signal processing area. And, of course, the ability of silicon to detect visible radiation caused CCDs to be quickly developed as imaging sensors. Laboratory research now indicates that the CCD technology offers unprecedented capabilities in the area of radiation detection:
(1) Spectral response extends over a remarkable range of photon and particle energies. Devices exist that respond to photons throughout the entire spectral range of 1 to 10,000 .ANG. and to electrons of energy greater than 1 keV.
(2) While noise performance varies dramatically among CCDs, levels as low as 7 e.sup.- (rms) per pixel have been realized in groundbased astronomical instruments and 4 e.sup.- (rms) per pixel in laboratory cameras. Such levels permit the detection and measurement of very faint incident radiation, particularly when coupled with the CCD's capacity to integrate for long periods (several hours) at low temperature. Noise levels as low as 1 e.sup.- appear achievable in the future.
(3) For wavelengths below about 100 .ANG. (120 eV), CCDs provide photon-counting sensitivity that is equivalent to or better than that of photocathode/photomultiplier devices. With foreseeable reductions in CCD noise, such photon-counting performance could be extended to wavelengths as great as 1000 .ANG. (12 eV).
(4) For wavelengths below about 10 .ANG. (&gt;1200 eV), some current CCDs can directly measure the photon energy with an accuracy of about 200 eV (3.sigma.). Foreseeable improvements in noise performance and device structure could lead to accuracies of 50-eV at wavelengths as great as 100 .ANG. (120 eV).
(5) Existing chips offer formats as great as 1024.times.1024 pixels and physical sizes as large as 18.times.18 mm, both of which are well in excess of that needed for current bandwidth limited broadcast applications, but are of substantial value to scientific users. Single devices of approximately three times this size are under development, and mosaicked arrays of CCDs can provide still greater focal plane coverage in ways that are impossible with vidicons.
Current scientific applications exploit these capabilities to only a very small degree.
CCD Structures
While the concept of charge coupling is well defined, it has been implemented by semiconductor manufacturers in a wide variety of ways. Two specific CCD structures which represent quite well the diversity of approaches will first be described. FIG. 1 illustrates schematically a cross section of one pixel in a three-phase CCD. The pixel consists of three overlying gates that induce a potential profile to gather and confine photon produced charge units (e.sup.-). By clocking these gate potentials in a coordinated fashion, the charge units can be made to physically travel through the silicon into an adjacent pixel. The oxide and overlapping gates are thick enough to absorb short-wavelength photons and soft x-rays, so that the silicon substrate of the device is thinned to about 10 .mu.m and illuminated from the back. See U.S. Pat. No. 4,245,158, and particularly column 5 for a discussion of this backside illumination technology for the three-phase CCD.
FIG. 2 illustrates schematically a cross section of one pixel in a virtual-phase CCD. In this device, a four-step potential profile within each pixel is achieved with ion implantation, and a single overlying gate clocks two of these potential steps to effect charge transfer. FIG. 2 shows schematic diagrams of the potential well configuration for the virtual-phase CCD. There are four sections in a pixel of interest from left to right. The first and second sections under a gate 10 are called the clock barrier and clocked well, respectively. The next section is called the virtual phase, which functions as a fixed barrier, and the last section is called the well because it has the lowest potential when the first two sections are up under control of the gate, i.e., when the negative control signal .phi..sub.1 applied to the gate is low. During one phase, the gate is held at a high negative voltage, so that the first two sections are at a low potential for accumulation of electrons. Then for transfer of the charge from left to right, the negative gate voltage is lowered, thus raising the potential in the first two sections from the levels shown in dashed line to the levels shown in solid line. Since there is only one gate layer that overlies half of each pixel, it is possible to achieve significant short-wavelength response with frontside illumination. Other CCD structures include two-phase and four-phase designs. The virtual phase CCD is an extension of the two-phase CCD.
Virtual-Phase CCD Operation
It is known that the two-phase structure can be operated with a single clock that is driven above and below a fixed dc potential applied to the other phase, as shown in FIG. 3. For a virtual-phase CCD, however, the clock that is held as the dc potential in the two-phase CCD is fabricated into the silicon by implanting positive (+) ions, as noted above, and is biased at the substrate potential as shown in FIG. 4. The method by which this virtual-phase gate (indicated by the legend VP in FIG. 4) is operated is based on a phenomenon called "potential pinning" which will now be described.
For this discussion, it is assumed that an n-type buried channel is used. FIG. 5 is a typical potential profile for a buried-channel CCD. The gate voltage is indicated by V.sub.g and the surface and maximum potentials are indicated by the symbols .phi..sub.s and .phi..sub.m, respectively. As the gate voltage V.sub.g is lowered to a more negative bias from V.sub.g1 to V.sub.g2, the surface potential .phi..sub.s is also lowered from .phi..sub.s1 until it reaches the level where .phi..sub.s2 =0. At this point holes from the implanted regions flow across the surface, causing a channel inversion. The inversion forms an effective back bias, which "pins" the surface potential and prevents further lowering of .phi..sub.s. The maximum potential .phi..sub.m2 shown in FIG. 5 when .phi..sub.s2 =0 remains at a fixed positive value and allows photo-generated charge to collect or transfer under the layer of holes. The potential of the virtual-phase gate VP is thus created within the implanted virtual phase and well regions of the sensitive silicon, and remains fixed (pinned) during both a photon integration phase (dashed line in FIG. 4) and a transfer phase (solid line in FIG. 4). In that manner, a "pinned" potential virtual phase and well for the CCD replaces the dc gate potential used in the two-phase device described above with reference to FIG. 3.
By comparing FIG. 4 with FIG. 3, it is seen that the virtual-phase CCD achieves the same result with a single gate electrode per pixel that the two-phase CCD achieves with two electrodes per pixel. The two sections under the single gate electrode are active during the clocked phase of a transfer, and the other two sections are active as a channel stop during the other virtual phase used to integrate photon produced charge units in the clocked well (second of four sections in the virtual-phase CCD pixel). These sections are therefore called the "clocked phase" and the "virtual phase" sections of a pixel.
In fabrication, all four sections are first doped uniformly, forming an n-type buried channel 12. The potential well in the clocked phase (i.e., under the gate 10) is formed by a shallow n-type implant under the second section, indicated by ++++ in FIG. 2. A deep n-type implant is used to form the virtual barrier in the third section, and an even heavier deep n-type implant is used in the fourth section to form a potential well there. Because doping within this last section of the virtual phase is high, pinning this section would require a large negative gate bias. This can be avoided by a shallow p-type implant indicated by ---- in FIG. 2. Such a p-type implant close to the surface of the silicon forces the surface potential to stay pinned for both negative and positive gate voltages. Thus, the gate electrode over the virtual phase (third and fourth sections) can actually be eliminated since it does not affect the potential profile in the silicon. Eliminating the gate improves quantum efficiency for frontside illumination in the blue region of the spectrum.
As will be described more fully hereinafter, the present invention utilizes backside illumination of any thinned CCD, whether it be four-phase, three-phase, two-phase or virtual-phase (single phase with a virtual second phase) in a manner which yields very high quantum efficiency for blue, ultraviolet, far ultraviolet and low energy x-ray wavelengths. However, the specific embodiment to be described herein by way of example, and not by way of limitation, utilizes the virtual-phase CCD because it allows storage of analog information, such as image data, via photon or ion impact to cause excess charge states representing analog information; stored data is retrieved by a combination of bias, charge integration and normal CCD readout.
In the case of such storage by ion implant, the storage is permanent, whereas in the case of storage by photon implant, the memory is reliable for only a limited number of readouts. This phenomenon of memory for multiple readout in the virtual-phase CCD is due to the ability to bias the control gate past channel inversion into what has been called th "excess charge region" where electrons flow freely into the oxide layer just under the gate electrode. There the electrons recombine with the radiation induced holes. This produces conductivity differences throughout the oxide layer over the array of pixels. An image thus produced by excess charge in the oxide layer, which may be called to oxide image, as distinct from the normal CCD image, may be read out many times by proper control of the gate bias. The oxide image, or analog information, may thus be stored and repeatedly retrieved, and in the case of the photon created oxide image, it may be erased.